Blog

Advanced support for Teradyne HSSub PXIe systems

We announced today the extended integration of ScanWorks’ boundary-scan test capabilities with the Teradyne’s PXI Express-based High Speed Subsystem (HSSub). Come see a demo at our Booth #101 at the AUTOTESTCON conference!

ASSET and CCI collaborate on integrated test solutions

Combining boundary-scan structural test with functional test is a “best practice” approach to high test coverage at least cost. So, it only makes sense that ASSET collaborates with Circuit Check.

NBT at the BTW

ASSET’s Michael Johnson presented an update on Non-intrusive Board Test (NBT) at the 13^th Annual Board Test Workshop (BTW) in Fort Collins, CO this past week. The overall question posed at the Workshop was, “Is Board Test Losing Relevance”?

Boundary-Scan Test on the TI MSP430

The MSP430 is a mixed-signal microcontroller family from Texas Instruments. Built around a 16-bit CPU, the MSP430 is designed for low cost, low power consumption embedded applications. But, does it support boundary scan for board test purposes?

Using Boundary-Scan Test at Debug & Repair Stations

Is it possible to use JTAG at debug & repair depots to reduce the cost of diagnosing bad boards?

JTAG and IJTAG-based Fast Flash Programming Algorithms

In recent years, the increasing size of flash memory has driven device programming to offline methods. However, new techniques are significantly reducing in-system programming times, making it much more feasible and convenient to program flash memory after it’s already been soldered to the board.

High Availability within Software-Defined Networks

As network functions become virtualized and proprietary hardware migrates to commodity Intel-based servers, will Carrier service levels degrade?

JTAG|DDR4 Connectivity Test Mode (JESD79-4)

Recently launched DDR4 devices have what memory device vendors may refer to as a “boundary scan” test mode. Even though there’s not really a boundary-scan function involved on the DDR4 side, this mode actually has been, as claimed by JEDEC, “designed to work seamlessly with any boundary-scan devices.” Here’s a brief introduction to what it does and how to test it with a boundary-scan (JTAG) tool.

JTAG Boundary-Scan Test for the Intel Innovation Engine

As described in earlier blogs, the new Intel Innovation Engine (IE) makes an ideal host for validation, debug, trace and test applications on Intel platforms. This article details the implementation of a JTAG execution engine on the IE for the purposes of printed circuit board structural and functional testing.

Embedded Boundary-Scan Test

Boundary-scan test is used commonly on manufacturing lines with a “benchtop” tester, complete with cables, fixturing, hardware probes, and so on. What are the pros and cons of embedding this technology in-situ?