Intel Processor Trace (Intel PT) is a capability on new Intel silicon that captures information about software execution using dedicated hardware facilities inside the chip. How is it used to debug UEFI?
Heterogeneous Computing refers to systems that use more than one kind of processor, typically a combination of CPUs and GPUs, sometimes on the same silicon die. Is this solution optimized for supercomputing applications?
Connectivity for hardware-assisted software debuggers on Intel® platforms is about to change radically. Over the years, debugging an Intel platform with a hardware-assisted debugger has been marked by a progression of printed circuit board (PCB) real estate-grabbing connectors. These connectors were designed to provide access to the processor for run-control and enable software debuggers.
Conventional printf statements within a BIOS being debugged add a lot of “backpressure” due to the overhead within the printf routine and the cost of directing the output through a slow serial port. This slows the debugging process down, and may even mask some time-sensitive bugs. Is there a better, more non-intrusive way?
In a previous blog, I described how the ScanWorks Embedded Diagnostics (SED) utility runs Intel CScripts nearly as fast as legacy methods. This applies in particular using the Emulex Pilot4 BMC, with its on-chip JTAG Master.
Ever since the very beginning of the electronics industry, the finger pointing has been nonstop. Malfunctions in a system or a circuit board as it rolls off the assembly line have to be diagnosed, of course. When they are, the chip supplier likely attributes the cause to the board. But the board manufacturer probably points to a chip as the culprit. And so the finger pointing begins.
As the UEFI Forum continues to make advances in the technology behind what is still called the BIOS (Basic Input/Output System), ASSET has joined this standards body to assist in the debug of its latest features.