There was a time when an at-speed functional test of anything required functional operating firmware. Not so for I2C serial interfaces anymore. A new test methodology involving IEEE 1149.1 JTAG (boundary scan), an FPGA and embedded instrumentation IP means that the design and manufacturing test teams don’t have to wait around for the software department to finish the firmware for a circuit board design. They can start testing right away. Even prototypes of the design. In addition, they don’t need to spend all that time developing functional test routines that won’t provide the kind of diagnostics that’s needed anyway.