Vice President Sales, ASSET InterTech
Alan Sguigna has more than 20 years of experience in senior-level general management, marketing, engineering, sales, manufacturing, finance and customer service positions. Before joining ASSET, he worked in the telecom industry. He has had profit and loss responsibility for a $150 million division of Spirent Communications, a supplier of test products and services. Prior to his tenure with Spirent, he also served in business development positions with Nortel Networks, overseeing the growth of its voice over Internet protocol (VoIP) products.
Vice President Design Validation and Test, ASSET InterTech
Tim Caffee obtained dual degrees, B.S degree in Mathematics and a B.S degree in Computer Science, at Old Dominion University, Norfolk, Virginia. He is one of the founders at ASSET InterTech, Inc. He has spent the last 16 years working with ASSET’s boundary-scan tools based on IEEE 1149.1 technology. His current focus is to expand ASSET’s core products to add support for silicon instruments to be used in the area of Design Validation. Prior to ASSET, he spent several years at Texas Instruments and held numerous positions in the Defense Group.
Vice President Software Debug and Trace, ASSET InterTech
Larry Traylor co-founded Arium Corporation in 1977. Larry served as president, CEO, and chairman of the board of Arium. He was instrumental in driving the vision for product creation. This company designed and produced hardware based program debug and code trace tools. In 2013, Larry joined ASSET InterTech when that company acquired Arium. He spent his youth in Claremont California with formal education that included a BSEE from Cal-Poly Pomona. When not working, Larry enjoys boating and music.
Chief Technologist, Non-intrusive Board Test and JTAG, ASSET InterTech
Adam ensures that ASSET’s non-intrusive board test (NBT) methodologies comprise a best-in-class solution to meet the evolving need for improved coverage of board test in the face of ongoing erosion of physical access. Pursuant to ASSET’s strong support for standards, Adam is an active participant in IEEE 1149.1, having previously served terms as working group vice chair and as standard technical editor (for the 2001 revision), as well as in nearly all related standards, to include: 1149.4, 1149.5, 1149.6, 1149.7, 1149.8.1, 1500, 1532, 1581, P1149.1.1, P1149.10, iNEMI boundary-scan adoption, PICMG MicroTCA, and SJTAG (system JTAG). Adam’s experience prior to ASSET spanned over a decade at Texas Instruments, Sherman TX, where he had roles in application support for TI’s boundary-scan logic products and for test and characterization of new logic families. Adam earned the BSEE degree from Oklahoma State University, Stillwater OK, in 1986.
Chief Technologist – Embedded Instrumentation Methodologies and IJTAG, ASSET InterTech
Al Crouch, Chief Technologist at ASSET InterTech, is a Senior Member of the IEEE. He was formerly chief scientist and director of research and development at Inovys Corp. of Pleasanton, Calif., and Verigy Ltd. of Cupertino, Calif. Al has served as the vice chairman of the IEEE P1687 IJTAG working group that is developing the IJTAG standard and has contributed significantly to the hardware architecture definition. Over the last 20 years, he has accumulated vast experience in chip design-for-test at both Freescale Semiconductor (formerly Motorola) and Texas Instruments. Al has filed for more than 30 patents and been granted 15.
Product Manager Boundary-Scan Test, ASSET InterTech
Kent Zetterberg started his career in the automation industry, working with systems from ABB, Siemens and others. Following graduation from the University of Gävle with a Bachelor’s of Science Degree in Computer Engineering, he worked 15 years in the telecom industry where he held various positions involving hardware test and debug. He joined Ericsson AB in Sweden in 1997 where he developed functional test programs for processor boards, and designed interface boards and test fixtures. At Ericsson he became an expert in boundary scan and eventually led the boundary scan team. With ASSET Kent has held several positions in support, serving as a customer trainer and European support team leader. Currently he is the technical product manager for ScanWorks boundary-scan test products.
Arium Product Manager, ASSET InterTech
Larry Osborn, Arium Product Manager at ASSET InterTech, has over 25 years of experience in product management, hardware/software product design and development, product delivery to the marketplace and user support. Over the years, Larry has a proven track record for identifying user needs and opportunities in the marketplace, providing innovative solutions and exceeding the expectations of users. At ASSET, Larry is responsible for the profit and loss for a product group. Prior to ASSET, he has held positions with Lockheed Martin, OCD Systems, Windriver, Hewlett-Packard, Ford Aerospace and Intel® Corporation. He holds a Bachelor’s Degree in Computer Science from the University of Kansas and various technical and marketing training certifications.
Product Manager High-Speed I/O Validation, ASSET InterTech
Eric has been involved with circuit board design and test for 15 years. Following graduation from Iowa State University with a Bachelor’s Degree in Electrical Engineering, Eric was a hardware designer for Rockwell Collins. He designed a variety of circuit boards, including several that were integrated into test equipment. At Rockwell Collins, he became an expert in boundary-scan test development. He joined ASSET 12 years ago as an applications engineer and soon advanced to the position of Senior Technologist. He currently serves as the Technical Product Manager for ASSET’s ScanWorks High-Speed I/O products and solutions.