Not all memories are created equal. Some DIMM suppliers’ cards have margins that are better than others. And of course, the better the margins, the better the performance of the system, and the fewer blue screens.
We all know that signal integrity is critical for optimal system performance. High-speed signals on serial IO such as PCI Express, and on memories like DDR3, should operate with very low bit error rates. What this means is that under normal operating conditions, the margin (or shape and size of the “eye diagram”) should be large enough so that there is a very low probability of a bit flip. Single or multi-bit errors are either correctable or uncorrectable, with either a performance impact, or a system crash or hang.
Notebook DIMMs are made by many companies, including Corsair, Kingston, Patriot, Samsung, Crucial, and others. It is fairly straightforward to measure the design margins of different DIMM suppliers, to see which perform better and are more reliable. We hooked up ScanWorks for Intel HSIO to a garden-variety notebook customer reference board and ran a 1-D voltage margining test on two different vendors. The results for “Vendor X” and “Vendor Y” are below:
The green indicates passing lanes, and red indicates failing lanes. Vendor X has excellent margins; on the positive voltage side all lanes are passing at the maximum allowed range, and on the negative voltage side we are comfortable at the -40 voltage ticks (well past the defined eye mask at which margins are unsatisfactory). Vendor Y, on the other hand, is right at the very edge of the guard band. On the positive voltage side, a couple of lanes are approaching 24 ticks, which is on the “hairy edge”. On the negative voltage side there’s a little bit more margin, but maybe not enough to survive the variances that will occur across different lots of silicon and circuit boards.
So whose memory would you buy, Vendor X or Vendor Y?
These are, of course, just the results of a single test. As referred above, variances in the chips or boards may produce unacceptable margins once a design has gone into volume production. An excellent e-Book on the source of manufacturing variances is here: http://www.asset-intertech.com/Products/High-Speed-I-O-Validation/HSIO-Software/Manufacturing-Variance-e-Book.