Many legacy In-Circuit Testers (ICT) support some kind of boundary scan for structural testing, to address limited access issues. But are these as good as advertised?
Continue reading "The Limitations of Boundary Scan on ICT" »
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May 2012
May 28, 2012
May 20, 2012
Pollution, Power Margins, and SerDes Problems
In addition to board design/layout issues, manufacturing defects and variances, other factors such as pollution and power marginalities can affect a design’s signal integrity and subsequent performance.
Continue reading "Pollution, Power Margins, and SerDes Problems" »
May 13, 2012
Flying Probe Testers and Boundary Scan
Today’s flying probe testers can give high structural test coverage, making them ideal for prototype board bring-up and low-volume manufacturing. But they can be darned slow. Can boundary scan help?
