Once upon a time, circa mid-1980's, surface mount technology (SMT) was becoming all the rage and it was widely reported that in-circuit test (ICT) was doomed! Along came the Joint Test Action Group (JTAG) to the rescue and in 1990 they gave us IEEE-1149.1 standard boundary scan as salve. But lo, ICT had (at least) nine lives and would not die—the purveyors of "heavy metal" kept (keep) coming up with new innovations to keep the heart of the beast ticking…
The reports of the death of ICT had, indeed, been greatly exaggerated. In fact, by around 2000 or so, boundary scan was viewed more as a technology to complement ICT and, in fact, to be integrated with it. Case in point, even we, ASSET, rolled out ScanWorks® for 3070 and other "roll up" solutions to be used with Agilent and Teradyne testers.
Well, another 10 years on, the question still arises, "Is ICT Dead and Does Anyone Care?" (a question taken up in a panel session of the 2010 Board Test Workshop earlier this month). With ball grid arrays (BGA), no-leads packages (NLP), and 0201 passives in the mainstream and with microvias, blind and hidden vias, other high density interconnects and 01005 passives going mainline soon, the ability to (intrusively) physically probe boards for test—the lynchpin for ICT—is quickly diminishing. Combine this with increasing use of differential and high speed IO and we find that customers and prospects are getting serious about putting ICT out to pasture.
But, if boundary scan couldn't nail the giant's coffin shut, what can? The answer is non-intrusive board test (NBT)—the ability to test boards without probes as enabled by a stable of technologies available on the ScanWorks Platform for Embedded Instruments—namely, our stalwart, boundary scan, along with newcomers processor-controlled test (PCT) and IO instrumentation, and coming soon, core instrumentation.
Even so, ICT continues to cast a long shadow—even if physical access is restrictive, customers and prospects still consider it the benchmark for test coverage and diagnostic precision. In other words, we still have our work cut out for us: how will NBT truly displace ICT in the sense of providing equivalent coverage and precision? Questions abound, such as, how do we quantify NBT coverage? What design-for-test (DFT) innovations may be required? And so on…
We'll be examining these issues over the next few weeks. Your contributions are invited! Please share your ideas!!
5 Responses
An interesting insight into the demise of ICT. If ICT would not die with the garlic that was lack of access then surely Differential and High Speed IO will be the silver bullet that finally kills it off.
Yes, there have been various attempts to address high speed I/O on ICT, such as bead probes, IEEE 1149.6 and even the IEEE P1149.8.1 initiative. But none have enjoyed widespread adoption for various technical reasons. I’ll write up another Blog on those stalled alternatives in the future.
The demise of ICT has been around for a while, many of my customers are very interested in moving off ICT but up until now, scan has not been able to measure V, I, or R. This said the chip technology is driving many customers to NBT due to package geometry and pin spacing. It will be the chip packaging and High Speed IO that limit ICT to doing Power On testing but little board structural testing.
ICT will continue to be a viable test option for many applications, but as design engineers migrate towards a standard off the shelf processor ( i.e. Intel/Freescale/PowerPC) to reduce costs and enhance capabilities, the test solution should drift towards Non-Instrusive Board Test (NBT). If they change today it will allow them to reduce costs and compete better in their industry now!
Since your article was posted, the 2010 Board Test Workshop (BTW) materials have been posted and are linked to/ through the BTW website ( http://www.molesystems.com/BTW ). For ease of reference, here’s a link to some slides associated with the panel session you mention – http://www.molesystems.com/BTW/material/BTW10//Presentations/Session%204.pdf