More and more chips uses onboard high-speed interconnect networks. Processors talking to co-processors; data shuffling from fast memory access; complete chipset implementations on 3rd party boards and so on. We consumers want action when we press a button, right?!
Just one problem. Built-in test techniques such as JTAG 1149.1 wasn’t built for AC-coupled or differential high-speed signals. Something new was needed. And so the extension to JTAG 1149.6 for Boundary-Scan Testing of Advanced Digital Networks was born.
The new standard specifies supplemental boundary-scan cells at advanced digital networks and corresponding boundary-scan instructions to generate stimuli and capture responses for AC coupling and/or differential signaling. Does it solve all high-speed interconnect problems? Read more to find out.