Last week, I wrote about my out-of-the-box experience with the Minnowboard Turbot, and how easy it was to start JTAG-based debugging on it with the SourcePoint tool. This week, I explored the UEFI shell, and updated the board firmware.
It is often part of a hardware validation test suite to initiate multiple PCIe bus retrains, looking for hardware design issues, or LTSSM RTL bugs in the device under test. These test suites take a very long time to run. Is there a way to speed them up?
Testing memories on Intel platforms can be a challenge. The normal options in production are structural tests using an ICT and/or functional tests leveraging the BIOS and POST codes. The problem with the ICT approach is that it may work for soldered-down memories, but not for DIMMs since those sockets are not populated at the ICT test stage. Another weakness of ICT is that it does not test the training sequence of the memory bus. This is a more functional-type test that must be successful before you can test the memories. A problem with using the BIOS is that it’s function is to boot at all costs, so some memories might be disabled through that process, and the POST code diagnostics are very limited.